1. Field of the Invention
The present invention relates to a metal oxide semiconductor field effect transistor (MOSFET) and a method for fabricating the same, and more particularly to a MOSFET having a self-aligned polycide structure with an increased channel length and a method for fabricating the MOSFET.
2. Description of the Prior Art
As a semiconductor device such as a MOSFET has a higher integration degree, the gate channel length thereof is reduced.
Referring to FIG. 1, there is illustrated a MOSFET fabricated in accordance with the prior art. The MOSFET shown in FIG. 1 is fabricated in the following manner. That is, a gate oxide film 2 and a gate electrode 3' made of a polysilicon layer are formed on a silicon substrate 1. Impurity ions are then implanted in a low concentration in the silicon substrate 1 so as to form lightly doped drain (LDD) regions. On side walls of the gate electrode 3', spacers 5 are then formed, respectively. Thereafter, impurity ions are implanted in a high concentration in the silicon substrate 1, thereby forming source/drain regions 6.
In this MOSFET, the channel length is reduced as the integration degree is increased. Where the channel length is reduced, the threshold voltage V.sub..tau. and the breakdown voltage V.sub.BD are reduced. The reduced channel length also results in an increased flow of current in the substrate. As a result, the electrical characteristic of the MOSFET is degraded.